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TB62725BPG/BFG/BFNG
TOSHIBABiCMOSIntegratedCircuitSiliconMonolithic
TB62725BPG,TB62725BFG,TB62725BFNG
8bitConstantCurrentLEDDriverofthe3.3Vand5VPowerSupplyVoltageOperation
The TB62725BPG/BFG/BFNG are comprised of constantcurrent drivers designed for LEDs and LED displays. The output current value can be set using an external resistor. As a result, all outputs will have virtually the same current levels. This driver incorporates an 8bit constantcurrent output, an 8bit shift register, an 8bit latch circuit and an 8bit ANDgate circuit. These drivers have been designed using the BiCMOS process. This devices are a product for the Pb free.
TB62725BPG
Features
Output current capability and number of outputs: 90 mA x 8 outputs Constant current range: 5 to 80 mA Application output voltage: 0.7 V (output current 5 to 80 mA) 0.4 V (output current 5 to 40 mA) For anodecommon LEDs Input signal voltage level: 3.3V and 5V CMOS level (Schmitt trigger input) Maximum output terminal voltage: 17 V Serial data transfer rate: 20 MHz (max, cascade connection) Operating temperature range: Topr = -40 to 85C Package: Type BPG: Type BFG: Type BFNG: DIP16P3002.54A SSOP16P2251.00A SSOP16P2250.65B
TB62725BFG
TB62725BFNG
Package and pin layout: Pin layout and functionality are similar to those of the TB62705C series and TB62725A series. (Each characteristic value is different.) Constantcurrent accuracy (all outputs on)
OutputVoltage
> = 0.4V
> = 0.7V
Weight DIP16P3002.54A:1.11g(typ.) SSOP16P2251.00A:0.14g(typ.) SSOP16P2250.65B:0.07g(typ.)
CurrentError betweenBits
6%
CurrentError betweenICs
15%
OutputCurrent
5to40mA
5to90mA
Company Headquarters 3 Northway Lane North Latham, New York 12110 Toll Free: 800.984.5337 Fax: 518.785.4725
Web: www.marktechopto.com | Email: info@marktechopto.com
California Sales Office: 950 South Coast Drive, Suite 225 Costa Mesa, California 92626 Toll Free: 800.984.5337 Fax: 714.850.9314
TB62725BPG/BFG/BFNG
PinAssignment(topview)
Pin layout and functionality are similar to those of the TB62705C. (each characteristic value is different.)
GND SERIALIN CLOCK LATCH OUT0 OUT1 OUT2 OUT3 VDD REXT SERIALOUT ENABLE OUT7 OUT6 OUT5 OUT4
BlockDiagram
OUT0
OUT1
OUT7
REXT
IREG
ENABLE Q L D LATCH Q L D L Q D
SERIALIN
D Q CK
D Q CK
D Q CK
SERIALOUT
CLOCK
TruthTable
CLOCK LATCH H L H X X ENABLE L L L L H SERIALIN Dn Dn + 1 Dn + 2 Dn + 3 Dn + 3 OUT0 OUT5 OUT7 DnDn - 5Dn - 7 Nochange Dn + 2Dn - 3Dn - 5 Dn + 2Dn - 3Dn - 5 Off SERIALOUT Dn - 7 Dn - 6 Dn - 5 Dn - 5 Dn - 5
Note1: OUT0 to OUT7 = OnwhenDn = Hto OUT0 to OUT7 = OffwhenDn = L. Inordertoensurethatthelevelofthepowersupplyvoltageiscorrect,anexternalresistormustbe connectedbetweenREXTandGND.
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TimingDiagram
n = 0 CLOCK
1
2
3
4
5
6
7
3.3V/5V 0V 3.3V/5V
SERIALIN 0V 3.3V/5V LATCH 0V 3.3V/5V 0V On OUT0 Off Off Off Off On
ENABLE
OUT1
Off
On
Off Off On
OUT3
Off
Off
Off Off
On OUT7 Off On Off Off 3.3V/5V SERIALOUT 0V
Warning: Latchcircuitisleveledlatchcircuit.Becarefulbecauseitisnottriggeredlatchcircuit. Note2: Thelatchescircuitholdsdatabypullingthe LATCH terminalLow. And,when LATCH terminalisahighlevel,latchcircuitdoesn'tholddata,anditpassesfromtheinputto theoutput. When ENABLE terminalisalowlevel,outputterminal OUT0 to OUT7 respondtothedata,andon andoffdoes. Attention: ThisICcanbeusedin3.3Vor5.0V.However,usetheVDDpowersupplyandtheinputlevelinthesame voltagesystem.
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TerminalDescription
PinNo. 1 2 3 4 PinName GND SERIALIN CLOCK LATCH OUT0 to OUT7 GNDterminalforcontrollogic. Inputterminalforserialdatafordatashiftregister. Inputterminalforclockfordatashiftonrisingedge. Inputterminalfordatastrobe. Whenthe LATCH inputisdrivenHigh,dataislatched.WhenitispulledLow,dataishold. Constantcurrentoutputterminals. Inputterminalforoutputenable. 13 ENABLE Alloutputs( OUT0 to OUT7 )beturnedoff,whenthe ENABLE terminalisdrivenHigh. Andareturnedon,whentheterminalisdrivenLow. 14 15 16 SERIALOUT REXT VDD OutputterminalforserialdatainputonSERIALINterminal. Inputterminalusedtoconnectanexternalresistor.Thisregulatedtheoutputcurrent. 3.3Vand5Vsupplyvoltageterminal. Function
5to12
EquivalentCircuitsforInputsandOutputs
ENABLE Terminal
R(UP) VDD 200kW
LATCH Terminal
VDD
100 W GND
GND
R(DOWN)
CLOCK,SERIALINTerminal
VDD
SERIALOUTTerminal
VDD
CLOCK, SERIALIN
250kW
ENABLE
LATCH
100 W
100 W
SERIALOUT 100 W
GND
GND
OUT0 to OUT7 Terminals
OUT0 to OUT7 ParasiticDiode GND
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MaximumRatings(Topr = 25C)
Characteristics Supplyvoltage Inputvoltage Outputcurrent Outputvoltage BPGtype (whennotmounted) BFG/BFNGtype (whennotmounted) BFG/BFNGtype(on PCB) BPGtype (whennotmounted) BFG/BFNGtype (whennotmounted) BFG/BFNGtype(on PCB) Symbol VDD VIN IOUT VOUT Pd1 Rating 6 -0.2toVDD + 0.2 90 -0.2to17 1.47 0.37 Pd2 0.78 Rth(ja)1 Rth(ja)2 Rth(ja)3 Topr Tstg 85 330 160 -40to85 -55to150 C C C/W W Unit V V mA/ch V
Power dissipation (Note 3)
Thermal resistance (Note 3)
Operatingtemperature Storagetemperature
Note3: BPGtype:Powerdissipationisdelatedby11.76mW/Cifdevice ismountedonPCBandambient temperatureisabove25C. BFGandBFNGtype:Powerdissipationisdelatedby7.69mW/CifdeviceismountedonPCBandambient temperatureisabove25C. WithdevicemountedonglassepoxyPCBoflessthan40%Cuandof dimensions50mm 50mm 1.6mm
RecommendedOperatingConditions(Topr = -40Cto85Cunlessotherwisespecified)
Characteristics Supplyvoltage Outputvoltage Symbol VDD VOUT IOUT Outputcurrent IOH IOL VIH Inputvoltage VIL Clockfrequency LATCH pulsewidth ENABLE pulsewidth (Note 4) CLOCKpulsewidth SetuptimeforCLOCKterminal HoldtimeforCLOCKterminal Setuptimefor LATCH terminal tw ENABLE twCLOCK tSETUP1 tHOLD tSETUP2 3/4 10 50 3/4 3/4 3/4 3/4 fCLK t w LATCH IOUT > 20mA = IOUT < 20mA CascadeConnected 3/4 3/4 EachDC1circuit SERIALOUT SERIALOUT TestCondition 3/4 3/4 Min 3 3/4 5 3/4 3/4 0.7 VDD -0.15 3/4 50 2000 3000 25 10 0.7 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Typ. Max 5.5 4 80 -1 1 VDD + 0.15 0.3 VDD 20 3/4 3/4 3/4 3/4 3/4 ns MHz ns ns Unit V V mA/ch mA
mA
Note4: Whenthepulseofthelowlevelisinputtedtothe ENABLE terminalheldinthehighlevel.
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ElectricalCharacteristics(VDD = 5V,Ta = 25Cunlessotherwisespecified)
Characteristics Supplyvoltage Symbol VDD IOUT1 IOUT2 Outputcurrent IOUT3 IOUT4 DIOUT1 DIOUT2 Outputleakagecurrent IOZ VIH Inputvoltage VIL SOUTterminal VOL 3/4 IOH = 1.0mA,VDD = 3.3V IOH = 1.0mA,VDD = 5V IOL = -1.0mA,VDD = 3.3V IOH = 1.0mA,VDD = 5V VDD = 3V (R) 5.5V ENABLE terminal LATCH terminal VOUT = 15.0V VOUT = 15.0V, AlloutputsOFF VOUT = 15.0V, AlloutputsOFF VOUT = 0.7V, AlloutputsON REXT = OPEN REXT = 490 W REXT = 250 W REXT = 490 W TestCondition Normaloperation VOUT = 0.4V, VDD = 3.3V VOUT = 0.4V, VDD = 5V VOUT = 0.7V, VDD = 3.3V VOUT = 0.7V, VDD = 5V VOUT = 0.4V, AlloutputsON VOUT = 0.7V, AlloutputsON VOUT = 15V 3/4 REXT = 490 W REXT = 250 W REXT = 490 W REXT = 250 W REXT = 490 W REXT = 250 W Min 4.5 29.84 29.58 58.40 57.55 3/4 3/4 3/4 0.7 VDD GND 3/4 3/4 3 4.7 3/4 100 125 3/4 1 3 3/4 3/4 3/4 REXT = 250 W 3/4 3/4 29 Typ. 5 35.10 34.80 68.70 67.70 1.5 1.5 1 3/4 3/4 3/4 3/4 3/4 3/4 1.5 200 250 0.1 3 6 6 3/4 12 Max 5.5 40.36 40.02 mA 79.00 77.85 6 % 6 5 VDD V 0.3 VDD 0.3 V 0.3 3/4 3/4 5.0 400 500 0.5 5 8 9 15 17 mA % kW kW V mA Unit V
Outputcurrent Errorbetweenbits
Outputvoltage Outputcurrent Supplyvoltage Regulation Pullupresistor Pulldownresistor
VOH
%/VDD R(Up) R(Down) IDD(OFF)1 IDD(OFF)2 IDD(OFF)3
Supplycurrent IDD(ON)1
Sameastheabove,Topr = -40C VOUT = 0.7V, AlloutputsON Sameastheabove, Topr = -40C
IDD(ON)2
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SwitchingCharacteristics(Topr = 25Cunlessotherwisespecified)
Characteristics Symbol TestCondition CLKto OUTn , LATCH = "H", ENABLE = "L" LATCH to OUTn , ENABLE = "L" ENABLE to OUTn , LATCH = "H" CLKtoSERIALOUT CLKto OUTn , LATCH = "H", ENABLE = "L" LATCH to OUTn , ENABLE = "L" ENABLE to OUTn , LATCH = "H" CLKtoSERIALOUT 10to90%ofvoltagewaveform 90to10%ofvoltagewaveform Cascadeconnectionisn'tguarantee. (Note5) 3/4 3/4 3/4 2 40 40 3/4 3/4 3/4 3/4 3/4 2 Min Typ. Max Unit
tpLH1 tpLH2 tpLH3 Propagationdelaytime tpLH tpHL1 tpHL2 tpHL3 tpHL Outputrisetime Outputfalltime Maximumclockrisetime Maximumclockfalltime tor tof tr tf
150 140 140 5 170 170 170 5 85 70 3/4 3/4
300 300 300 3/4 340 340 340 3/4 150 150 5 5 ns ns us us ns
Conditions: (refertotestcircuit.) Topr = 25C,VDD = VIH = 5V,VOUT = 0.7V,VIL = 0V,REXT = 490 W,VL = 5.0V,RL = 100 W, CL = 10.5pF Note5: Ifthedeviceisconnectedinacascadeandtr/tf forthewaveformislarge,itmaynotbepossibletoachieve thetimingrequiredfordatatransfer.Pleaseconsiderthetimingscarefully.
TestCircuit
IDD
VIH ,VHL
ENABLE CLOCK
VDD
RL OUT0 CL
Function generator
IOL LATCH SERIALIN SERIALOUT REXT GND CL Iref VL OUT7
Logicinput waveform
VDD = VIH = 5V VIL = 0V tr = tf = 10ns (10%to90%)
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TimingWaveforms
1.CLOCK,SERIALIN,SERIALOUT
twCLK CLOCK 50% tSETUP1 SERIALIN 50% tHOLD SERIALOUT 50% tpLH/tpHL 50% 50%
2.CLOCK,SERIALIN, LATCH , ENABLE , OUTn
CLOCK
50%
SERIALIN tSETUP2 LATCH 50% twLAT ENABLE tSETUP3 50% 50% twENA 50%
OUTn tpHL1/LH1 tpHL2/LH2
50%
tpHL3/LH3
3. OUTn
90% OUTn 10% tof 10% tof ON 90% OFF
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OutputCurrent-Duty(LEDturnonrate)
IOUT -DUTYOnPCB (recommended)
100 100
IOUT -DUTYOnPCB (recommended)
80
80
IOUT (mA)
40
IOUT (mA)
BFG/BFNG BPG 40 60 80 100
60
60
40
Topr = 25C 20 VDD = 5.0V VCE = 1.0 V Tj = 120C(max) 0 0 20
Topr = 55C 20 VDD = 5.0V VCE = 1.0 V Tj = 120C(max) 0 0 20 40 60
BFG/BFNG BPG 80 100
DUTY - Turnonrate (%)
DUTY - Turnonrate (%)
Pd-Topr
1.6 100 1.4
IOUT -DUTYOnPCB (recommended)
Powerdissipation PD (W/IC)
1.2 BPG(Freeair) 1.0
80
IOUT (mA)
60
0.8 0.6 0.4 0.2 0 0 BFG/BFNG (mountedPCB)
40
Topr = 85C 20 VDD = 5.0V VCE = 1.0 V 20 40 60 80 100 Tj = 120C(max) 0 0 20 40 60
BFG/BFNG BPG
80
100
Ambienttemperature Ta (C)
DUTY - Turnonrate (%)
IOUT -REXT
90 IOUT(mA) = (1.15 REXT(W)) 14.9 80 70 60
IOUT (mA)
50 40 Topr = 25C 30 20 10 VCE = 0.7 V 0 100
500
1000
5000
10000
REXT (W)
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ApplicationCircuit(example1):ThegeneralcompositioninstaticlightingofLED.
More than VLED (V) > Vf (total max) +0.7 is recommended with the following application circuit with the LED power supply VLED. = r1: The setup resistance for the setup of output current of every IC. r2: The variable resistance for the brightness control of every LED module.
Example) TD62M8600:8bitmultichipPNPtransistorarray, whichisnotusedinstaticlightingsystem.
VLED
SCAN O1 SERIALIN C.U. ENABLE LATCH CLOCK TB62725BPG/BFG/BFNG 8bitSIPO,Latchesand Constantsinkcurrentdrivers O2 O5 O6 O7 SERIALOUT SERIALIN ENABLE LATCH CLOCK TB62725BPG/BFG/BFNG 8bitSIPO,Latchesand Constantsinkcurrentdrivers O1 O2 O5 O6 O7 SERIALOUT
r2
r1 = 100 W (min)
10
r1 = 100 W (min)
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TB62725BPG/BFG/BFNG
ApplicationCircuit(example2):WhentheconditionofVLEDisVLED > 17V.
The unnecessary voltage is one effective technique as to making the voltage descend with the zennor diode.
Example) TD62M8600:8bitmultichipPNPtransistorarray, whichisnotusedinstaticlightingsystem.
VLED
SCAN O1 SERIALIN C.U. ENABLE LATCH CLOCK TB62725BPG/BFG/BFNG 8bitSIPO,Latchesand Constantsinkcurrentdrivers O2 O5 O6 O7 SERIALOUT SERIALIN ENABLE LATCH CLOCK TB62725BPG/BFG/BFNG 8bitSIPO,Latchesand Constantsinkcurrentdrivers O1 O2 O5 O6 O7 SERIALOUT
r2
r1 = 100 W
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r1 = 100 W
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TB62725BPG/BFG/BFNG
ApplicationCircuit(example3):WhentheconditionofVLEDisVf + 0.7 < VLED < 17V.
VOUT = VLED - Vf = 0.7 to 1.0 V is the most suitable for VOUT. Surplus VOUT causes an IC fever and the useless consumption electric power. It is the one way of being effective to build in the r3 in this problem. r3 can make a calculation to the formula r3 (ohms) = surplus VOUT/IOUT. Though the resistance parts increase, the fixed constant current performance is kept.
Example) TD62M8600:8bitmultichipPNPtransistorarray, whichisnotusedinstaticlightingsystem.
r3
r3
VLED = 15V
SCAN O1 SERIALIN C.U. ENABLE LATCH CLOCK
O2
O5
O6
O7 SERIALOUT SERIALIN ENABLE LATCH
O1 O2
O5 O6 O7 SERIALOUT
8bitSIPO,Latchesand Constantsinkcurrentdrivers
8bitSIPO,Latchesand Constantsinkcurrentdrivers
TB62725BPG/BFG/BFNG
CLOCK
TB62725BPG/BFG/BFNG
r2
r1 = 100 W
12
r1 = 100 W
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Notes
Operation may become unstable due to the electromagnetic interference caused by the wiring and other phenomena. To counter this, it is recommended that the IC be situated as close as possible to the LED module. If overvoltage is caused by inductance between the LED and the output terminals, both the LED and the terminals may suffer damage as a result. There is only one GND terminal on this device when the inductance in the GND line and the resistor are large, the device may malfunction due to the GND noise when output switching by the circuit board pattern and wiring. To achieve stable operation, it is necessary to connect a resistor between the REXT terminal and the GND line. Fluctuation in the output waveform is likely to occur when the GND line is unstable or when a capacitor (of more than 50 pF) is used. Therefore, take care when designing the circuit board pattern layout and the wiring from the controller. This application circuit is a reference example and is not guaranteed to work in all conditions. Be sure to check the operation of your circuits. This device does not include protection circuits for over voltage, over current or over temperature. If protection is necessary, it must be incorporated into the control circuitry. The device is likely to be destroyed if a shortcircuit occurs between either of the power supply pins and any of the output terminals when designing circuits, pay special attention to the positions of the output terminals and the power supply terminals (VDD and VLED), and to the design of the GND line.
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PackageDimensions
Weight:1.11g(typ.)
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PackageDimensions
Weight:0.14g(typ.)
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PackageDimensions
Weight:0.07g(typ.)
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Aboutsolderability,followingconditionswereconfirmed Solderability UseofSn63Pb solderBath solderbathtemperature = 230C dippingtime = 5seconds thenumberoftimes = once useofRtypeflux UseofSn3.0Ag0.5Cu solderBath solderbathtemperature = 245C dippingtime = 5seconds thenumberoftimes = once useofRtypeflux
RESTRICTIONSONPRODUCTUSE
000707EBA
TOSHIBA is continually working to improve the quality andreliability of its products. Nevertheless, semiconductor devices in generalcanmalfunction or fail due totheirinherent electricalsensitivity and vulnerabilityto physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safetyinmakingasafedesignfortheentiresystem,andtoavoidsituationsinwhichamalfunctionorfailureof suchTOSHIBAproductscouldcauselossofhumanlife,bodilyinjuryordamagetoproperty. Indevelopingyourdesigns,pleaseensurethatTOSHIBAproductsareusedwithinspecifiedoperatingrangesas set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth inthe"HandlingGuidefor Semiconductor Devices,"or"TOSHIBA Semiconductor Reliability Handbook"etc.. TheTOSHIBAproductslistedinthisdocumentareintendedforusageingeneralelectronicsapplications(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). TheseTOSHIBAproductsareneitherintendednorwarrantedforusageinequipmentthatrequiresextraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shallbemadeatthecustomer'sownrisk. Theproductsdescribedinthisdocumentaresubjecttotheforeignexchangeandforeigntradelaws. Theinformationcontainedhereinispresentedonlyasaguidefortheapplicationsofourproducts.Noresponsibility isassumedbyTOSHIBACORPORATIONforanyinfringementsofintellectualpropertyorotherrightsofthethird parties which may result from its use. No license is granted by implication or otherwise under any intellectual propertyorotherrightsofTOSHIBACORPORATIONorothers. Theinformationcontainedhereinissubjecttochangewithoutnotice.
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